首页 | 本学科首页   官方微博 | 高级检索  
     


Automated synthesis of resilient and tamper-evident analog circuits without a single point of failure
Authors:Kyung-Joong Kim  Adrian Wong  Hod Lipson
Affiliation:(1) Mechanical and Aerospace Engineering, Cornell University, Ithaca, NY 14853, USA;(2) Present address: Department of Computer Engineering, Sejong University, 98 Gunja-Dong, Gwangjin-Gu, Seoul, 143-747, Republic of Korea;(3) Electrical and Computer Engineering, Cornell University, Ithaca, NY 14853, USA;(4) Present address: Sandia National Laboratories, Livermore, CA 94550, USA;(5) Computing and Information Science, Cornell University, 216 Upson Hall, Ithaca, NY 14853-7501, USA
Abstract:This study focuses on the use of genetic programming to automate the design of robust analog circuits. We define two complementary types of failure modes: partial short-circuit and partial disconnect, and demonstrated novel circuits that are resilient across a spectrum of fault levels. In particular, we focus on designs that are uniformly robust, and unlike designs based on redundancy, do not have any single point of failure. We also explore the complementary problem of designing tamper-proof circuits that are highly sensitive to any change or variation in their operating conditions. We find that the number of components remains similar both for robust and standard circuits, suggesting that the robustness does not necessarily come at significant increased circuit complexity. A number of fitness criteria, including surrogate models and co-evolution were used to accelerate the evolutionary process. A variety of circuit types were tested, and the practicality of the generated solutions was verified by physically constructing the circuits and testing their physical robustness.
Keywords:
本文献已被 SpringerLink 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号