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基于EVSS-LMS算法的三相幅相锁相系统
引用本文:郭文勇,赵彩宏,张志丰,肖立业,欧阳弈.基于EVSS-LMS算法的三相幅相锁相系统[J].电力系统自动化,2008,32(11):77-81.
作者姓名:郭文勇  赵彩宏  张志丰  肖立业  欧阳弈
作者单位:中国科学院电工研究所应用超导重点实验室,北京市,100080
摘    要:传统硬件锁相环无谐波畸变抑制能力且只能跟踪单相电压相位,无法有效提取三相正序分量相位的信息。文中为了适应三相电网的数学模型,将传统的变步长最小均方根算法从单输出系统扩展到多输出系统,提出一种三相幅相锁相系统。该系统根据电网电压谐波含量可自适应地调整步长值,从而实现了对谐波干扰有较好的抑制能力;同时,在电压突变等异常情况,对步长值进行重置,提高了对异常情况的处理速度,从而对于电压暂降等场合具有较快的响应速度。实验结果表明,该幅相锁相系统不仅具有较好的谐波和三相不平衡适应能力,而且能近乎无延迟地反映三相系统正序电压分量幅值和相位的变化,可广泛运用于与三相电网相连的电力电子装置。

关 键 词:变步长  电压暂降  三相锁相  扩展变步长最小均方根(EVSS-LMS)算法
收稿时间:2/21/2008 4:10:42 PM
修稿时间:5/21/2008 9:27:06 PM

A Novel Three-phase Magnitude-phase-lock Loop System Based on Extended Variable Step Size Least Mean Square Algorithm
GUO Wenyong,ZHAO Caihong,ZHANG Zhifeng,XIAO Liye,OUYANG Yi.A Novel Three-phase Magnitude-phase-lock Loop System Based on Extended Variable Step Size Least Mean Square Algorithm[J].Automation of Electric Power Systems,2008,32(11):77-81.
Authors:GUO Wenyong  ZHAO Caihong  ZHANG Zhifeng  XIAO Liye  OUYANG Yi
Abstract:The traditional hardware phase lock loop cannot operate properly in harmonic distorting.Also it can only extract the phase angle of a single phase and cannot extract the positive sequence phase angle of a three-phase power system.In order to adapt to the three-phase power system,the traditional single-output variable step size least mean square(VSS-LMS)algorithm is extended to multi-output system to construct a three-phase magnitude-phase-locked loop(3-MPLL).The proposed 3-MPLL can automatically adapt to the harmonic distorting of three-phase power system by adjusting step size accordingly,and can enhance the convergence speed greatly by resetting the step size to a large value when dips occur.Experiment results show that the 3-MPLL is not only available in the harmonic and three-phase unbalanced condition,but also can detect the magnitude and phase angle change of the positive sequence voltage of three-phase system with little time delay,thus it can be widely used in the power electronics equipments connected to the three-phase power system.
Keywords:variable step size  voltage sag  three-phase phase-lock loop  extended variable step size least mean square(EVSS-LMS)algorithm
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