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一种基于电压岛的片上网络低功耗设计
引用本文:何奇,王雷. 一种基于电压岛的片上网络低功耗设计[J]. 中国集成电路, 2011, 20(4): 34-39
作者姓名:何奇  王雷
作者单位:电子科技大学通信抗干扰技术国家级重点实验室,四川,成都,611731
摘    要:功耗问题一直是片上网络设计中最为关心的问题之一.基于全局异步局部同步(GALS)的电压岛(VFI)机制的引入不但提供了极大地降低片上功耗的可能,也解决了片上单时钟传输的瓶颈问题.本文改善了现有的两种电压岛划分、核映射及路由分配方法,提出了一种更优的综合解决方案,并进行了验证.仿真结果显示,本文的方案可以显著降低系统功耗,同时提高了片上网络性能.

关 键 词:片上网络  电压岛  低功耗  全局异步局部同步

A Low Power Framework for Networks-on-Chip based on Voltage-Frequency Islands
HE Qi,WANG Lei. A Low Power Framework for Networks-on-Chip based on Voltage-Frequency Islands[J]. China Integrated Circuit, 2011, 20(4): 34-39
Authors:HE Qi  WANG Lei
Affiliation:(National Key Laboratory of Science and Technology on Communications of UESTC Chengdu, China )
Abstract:Energy consumption has been one of the most concerned problems in NOC design. The introduction of voltage-frequency islands ( VFIs ) system based on the global asynchronous local synchronous ( GALS ) not only provides a strong probability to reduce on-chip power consumption greatly, but also solves the problem caused by distributing a single global clock signal throughout a chip. This paper proposes and validates an optimized framework based on two existent?techniques which generally consists of VFI-aware partitioning, VFI-aware mapping and VFI-aware routing path allocation. Simulation results show that our framework improves the on-chip performance as well as significantly reduces system power consumption .
Keywords:Networks-on-Chip   Voltage-frequency island   low power   GALS
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