| 基于RS码的可重构有限域乘法器的设计与实现 |
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| 引用本文： | 谭思炜,潘红兵.基于RS码的可重构有限域乘法器的设计与实现[J].计算机应用与软件,2011,28(8). |
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| 作者姓名： | 谭思炜 潘红兵 |
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| 作者单位： | 海军工程大学电子工程学院,湖北,武汉,430033 |
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| 摘 要： | 为了提高伽罗华有限域乘法器的通用性,降低实现的复杂度,采用自然基算法,用简单的逻辑门电路实现乘法运算过程。提出可重构的迭代计算结构,能满足域长m为3～8的乘法器,并用FPGA实现。结果表明,可重构有限域乘法器能够满足多种标准RS码的乘法运算的需要。
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| 关 键 词： | RS码 有限域 乘法器 可重构 |
DESIGN AND IMPLEMENTATION OF RECONFIGURABLE MULTIPLIER IN GALOIS FIELD BASED ON RS CODE |
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| Tan Siwei,Pan Hongbing.DESIGN AND IMPLEMENTATION OF RECONFIGURABLE MULTIPLIER IN GALOIS FIELD BASED ON RS CODE[J].Computer Applications and Software,2011,28(8). |
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| Authors: | Tan Siwei Pan Hongbing |
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| Affiliation: | Tan Siwei Pan Hongbing(Department of Electronic Engineering,Naval University of Engineering,Wuhan 430033,Hubei,China) |
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| Abstract: | In order to improve the universality of multiplier in Galois field and to reduce the complexity of its realisation,in this paper we adopt polynomial basis algorithm to realise the operation of multiplication by circuits of simple logic gates.A reconfigurable iterative computation structure for multiplier is proposed and it can satisfy a multiplier for arbitrary binary finite field between 3 and 8 bits.The structure is also realised by using Altera's FPGA.It is obvious that the reconfigurable multiplier in G... |
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| Keywords: | RS code Galois field Multiplier Reconfigurable |
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