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| 基于FPGA的高精度守时方法研究 | |
| 引用本文： | 王军,王磊,张福弟,何昕,曹永刚.基于FPGA的高精度守时方法研究[J].液晶与显示,2015,30(6):1052-1056. |
| 作者姓名： | 王军 王磊 张福弟 何昕 曹永刚 |
| 作者单位： | 1. 苏州科技学院, 江苏苏州 215009; 2. 中国科学院长春光学精密机械与物理研究所, 吉林长春 130033; 3. 中国人民解放军 63861部队, 吉林白城 137001 |
| 基金项目： | 国家自然科学基金(No.61472267) |
| 摘 要： | 提出一种基于现场可编程门阵列(FPGA)的高精度守时方法,以统计学为基准,结合高精度恒温晶振和北斗/GPS双模接收器产生同步标准秒脉冲信号。当授时系统导航卫星失连,系统根据存储晶振脉冲数计算出均值和方差,动态设置系统晶振脉冲计数器阈值从而模拟产生高精度秒脉冲信号,消除晶振累积误差。实验结果表明,1h内授时系统守时误差小于250ns,可满足授时系统在电力、靶场等系统中的守时要求。 |
| 关 键 词： | FPGA 双模 失连 守时 |
| 收稿时间： | 2015-03-18 |
Method for high accuracy time keeping based on FPGA |
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| WANG Jun,WANG Lei,ZHANG Fu-di,HE Xin,CAO Yong-gang.Method for high accuracy time keeping based on FPGA[J].Chinese Journal of Liquid Crystals and Displays,2015,30(6):1052-1056. | |
| Authors: | WANG Jun WANG Lei ZHANG Fu-di HE Xin CAO Yong-gang |
| Affiliation: | 1. Science and Technology University of Suzhou, Jiangsu, 215009, China; 2. Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Science, Changchun 130033 China; 3. The PLA Unit 63861, Baicheng 137001, China |
| Abstract: | Based on Field-Programmable Gate Array (FPGA), a high precision time keeping technology is proposed. Combined with high precision constant temperature crystals and BD/GPS dual-mode synchronous, standard second pulse signal is received based on statistics. If navigation satellite loses the connection, FPGA will set the pounding threshold of crystal pulse according to average value and variance to simulate producing highly precision second pulse so that cumulative error can be eliminated. Experimental results show that timing system error is less than punctual 250 ns in one hour which fully meets the requirements of time keeping of the timing system in the power systems, range systems and other systems. |
| Keywords: | FPGA dual-mode connection losing time keeping |
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