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一种全集成型CMOS LDO线性稳压器设计
引用本文:胡爱飞,王宏伟,潘理平.一种全集成型CMOS LDO线性稳压器设计[J].现代电子技术,2011,34(12):180-182.
作者姓名:胡爱飞  王宏伟  潘理平
作者单位:1. 南京机电职业技术学院,江苏南京,211135
2. 中航南京机电液压工程研究中心,江苏南京,211106
摘    要:设计了一种基于0.25μm CMOS工艺的低功耗片内全集成型LDO线性稳压电路。电路采用由电阻电容反馈网络在LDO输出端引入零点,补偿误差放大器输出极点的方法,避免了为补偿LDO输出极点,而需要大电容或复杂补偿电路的要求。该方法电路结构简单,芯片占用面积小,无需片外电容。Spectre仿真结果表明:工作电压为2.5 V,电路在较宽的频率范围内,电源抑制比约为78 dB,负载电流由1 mA到满载100 mA变化时,相位裕度大于40°,LDO和带隙电压源的总静态电流为390μA。

关 键 词:线性稳压电路  频率补偿  频率稳定性  瞬态响应

Design of Fully Integrated CMOS Low Dropout Regulator
HU Ai-fei,WANG Hong-wei,PAN Li-ping.Design of Fully Integrated CMOS Low Dropout Regulator[J].Modern Electronic Technique,2011,34(12):180-182.
Authors:HU Ai-fei  WANG Hong-wei  PAN Li-ping
Affiliation:HU Ai-fei1,WANG Hong-wei2,PAN Li-ping1(1.Nanjing Institute of Mechatronic Technology,Nanjing 211135,China,2.Nanjing Engineering Institute of Aircraft Systems,AVIC,Nanjing 211106,China)
Abstract:A fully integrated low dropout regulator(LDO) with low power consumption was designed on the basis of 0.25 μm CMOS process.A zero is introduced at the output end of LDO by the RC feedback network to cancel out one of the output poles.Therefore,large capacitors or complicate compensation circuits are avoided,and the chip area is reduced.This method is simple,less chip area occupation,and capacitorless.The simulation results show that with output current from 1 mA to 100 mA,the phase margin is above 40°,and the overshoot of transient response is less than 20 mV variation.The power supply rejection ratio(PSRR) is about 76 dB.The sum of quiescent current(without load) of LDO and bandgap voltage source is 390 μA.
Keywords:low dropout regulator  frequency compensation  frequency stability  transient response  
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