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Cut off frequency and transit time analysis of lightly doped drain (LDD) MOSFETs
Authors:Ciby Thomas  S. Haldar  Manoj Khanna  S. Rajesh  K.K. Gupta  R.S. Gupta
Affiliation:aSemiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi South Campus, Benito Juarez Road, New Delhi 110 021, India;bDepartment of Physics, Motilal Nehru College, Benito Juarez Road, New Delhi 110 021, India
Abstract:
Analytical model for the transconductance, cut off frequency, transit time and fringing capacitance of LDD MOSFETs is presented with a simple approach. The analysis is carried out considering the LDD device as a conventional MOSFET with a series resistance [Z.-H. Liu et al., Threshold voltage model for submicrometer MOSFETs. IEEE Trans Electron Devices 1993; ED-40: 86–94] and a simple closed form expressions for cut off frequency and transit time is obtained. The total gate capacitance, i.e. the geometric and fringing capacitance, is calculated for both LDD and non-LDD devices and lower fringing capacitance is reported in LDD devices. Lower cut-off frequencies and higher transit time are reported in LDD devices for the same channel length.
Keywords:
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