On the leverage of high-fT transistors foradvanced high-speed bipolar circuits

A detailed study on the leverage of high-f_T transistors for advanced high-speed bipolar circuit applications is presented. It is shown that for the standard ECL (emitter-coupled logic) circuit, the leverage of high f_T is limited by the passive resistors (emitter-follower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL (nonthreshold logic) circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high F_T becomes more significant