| 适用于IP设计的16位可扩展定点DSP |
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| 引用本文： | 吴奇祥,边立剑,童家榕. 适用于IP设计的16位可扩展定点DSP[J]. 微电子学, 2000, 30(5): 338-342 |
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| 作者姓名： | 吴奇祥 边立剑 童家榕 |
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| 作者单位： | 复旦大学,电子工程系,上海,200433 |
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| 摘 要： | 介绍了一种称为ＷＤＳＰ的１６位定点ＤＳＰ，它具有一条指令完成一向量操作及ＤＭＡ数据传输与数据运算并行操作的特点。该ＤＳＰ的结构和指令集设计规则，使其可根据不同的应用，通过增减功能模块及相应的指令来定制ＤＳＰ。
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| 关 键 词： | 数字信号处理 片上系统 冗余二进制 WDSP IP设计 |
| 修稿时间： | 1999-11-15 |
A Scalable 16-Bit Fixed Point DSP for IP Design |
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| WU Qi-xiang,BIAN Li-jian,TONG Jia-rong. A Scalable 16-Bit Fixed Point DSP for IP Design[J]. Microelectronics, 2000, 30(5): 338-342 |
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| Authors: | WU Qi-xiang BIAN Li-jian TONG Jia-rong |
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| Abstract: | A 16 bit fixed point DSP(WDSP) fo r IP design is described, whose architecture and instruction set are so re gular t hat it can be customized easily by adding or deleting some modules and correspon ding instructions to meet the requirements of various applications.The DSP can complete a vector operation by using only one instruction,and the DMA operation can be executed in parallel with other operations,so the time for transferring data can be saved. |
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| Keywords: | Digital signal processing IP design System on chip Redundant binary Hardware/Software partition |
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