航天器图像压缩小波变换的FPGA设计

为了实现基于FPGA的CCSDS图像压缩算法,在提升小波变换结构的基础上,提出了一种改进的基于行的并行3级2-D整数9/7小波变换实现结构.结构充分利用流水线设计技术,对于每一级2-D DWT,结构包含2个行处理器同时处理2行数据,借助10个行缓存存储变换的中间数据,实现了行、列变换的并行运算.同时对于3级小波变换,也采用了流水线结构,减少了存储器的使用量和对其访问造成的时间延迟,提高了变换速度.本结构完成分辨率为N×N灰度图像的3级小波分解所用的时钟周期约为O(N2/ 2).采用Altera的Stratix II FPGA实验,结果表明,本整数小波变换结构具有较高的吞吐率和变换速度,可以工作在86.5MHz的频率下,实现1024×1024灰度图像100fps的图像实时变换.

FPGA Design of Wavelet Transform in Spatial Aircraft Image Compression

A novel architecture based on lifting wavelet transform was proposed to implementing CCSDS image compression algorithm on FPGA. The lincbased parallel architecture which consists of two row processors performs 3 level 2-D 9/7 integer to integer forward discrete wavelet transform and can process the 2 row image data simultaneously. The row and column data arc processed in parallel way by storing the middle data in the 10 row buffer. The whole 3 level wavelet transform architecture is optimized in the pipeline design way and achieve lower utilization and less storage time. The architecture which has been demonstrated on Altera Stratix II FPGA performs a decomposition in approximutely Nz/ 2 clock cycles for an NX N gray image. According to the experimental results,the new architecture can implement the wavelet transform for 1024X1024 gray image at 100 frame per-second and working at 86. SMHz.