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基于FPGA的1553B总线消息收发系统的设计
引用本文:褚俊波,周勇,王能.基于FPGA的1553B总线消息收发系统的设计[J].太赫兹科学与电子信息学报,2008,6(2):101-105.
作者姓名:褚俊波  周勇  王能
作者单位:中国兵器工业第58研究所,四川,绵阳,621000
摘    要:根据1553B控制器输入输出标准和系统设计紧凑性、可靠性的要求,提出了基于现场可编程门阵列(FPGA)软核处理器Microblaze系统的数据收发方案。该方案实现了对1553B控制器的消息接收和发送功能。着重研究了硬件电路设计和总线功能仿真,并给出部分仿真和测试结果。经过实际使用验证了该方案能很好地满足1553B总线收发系统的要求。

关 键 词:Microblaze软核处理器  可订制IP  BFM仿真  1553B总线
文章编号:1672-2892(2008)02-0101-05
修稿时间:2007年10月22

Design of an FPGA-based 1553B Bus Message Receiving/Transmitting System
CHU Jun-bo,ZHOU Yong,WANG Neng.Design of an FPGA-based 1553B Bus Message Receiving/Transmitting System[J].Journal of Terahertz Science and Electronic Information Technology,2008,6(2):101-105.
Authors:CHU Jun-bo  ZHOU Yong  WANG Neng
Abstract:According to the requirement of the input/output standard of 1553B controller and the reliability and compactibility of the system,a scheme of a data transmission system using soft processor-Microblaze is proposed,in which the function of receiving/transmitting messages from/to the 1553B controller has been realized.The design of hardware circuit and the simulation of bus function model are studied particularly,parts of the results of simulation and test are presented as well.It has been demonstrated that the scheme has meet the requirement of 1553B bus transmission system well in practical application.
Keywords:Microblaze  Custom IP  BFM simulation  1553B bus
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