| 基于SOPC的DDS信号源的实现 |
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| 引用本文： | 郭书军,谢定华,王玉花.基于SOPC的DDS信号源的实现[J].电讯技术,2005,45(5):69-71. |
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| 作者姓名： | 郭书军 谢定华 王玉花 |
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| 作者单位： | 北方工业大学,信息工程学院,北京,100041 |
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| 摘 要： | 本文介绍了直接数字频率合成(DDS)的工作原理以及基于可编程片上系统(SOPC)实现DDS信号源。设计的DDS信号源以Cyclone器件为核心,用嵌入在FPGA中的N ios软核CPU作为控制来实现频率、相位和幅度的数字预制和步进,利用FPGA的RAM位放置正弦查找表,同时利用FPGA的逻辑单元实现相位累加等其它数字逻辑功能。实现了两路相位完全正交的DDS信号源。
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| 关 键 词： | 可编程片上系统 直接数字频率合成 现场可编程门阵列 |
| 文章编号： | 1001-893X（2005）05-0069-03 |
| 收稿时间： | 2005-10-07 |
| 修稿时间： | 2005-10-07 |
Implementation of DDS Based on SOPC |
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| GUO Shu-jun,XIE Ding-hu,WANG Yu-hua.Implementation of DDS Based on SOPC[J].Telecommunication Engineering,2005,45(5):69-71. |
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| Authors: | GUO Shu-jun XIE Ding-hu WANG Yu-hua |
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| Affiliation: | Collge of Information Engineering ,North China University of Technology ,Beijing 100041 ,China |
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| Abstract: | The theory of DDS and the implementation of DDS based on SOPC are introduced,and DDS signal source is designed by using Cyclone apparatus as a core.The realization of the frequency,prefabricate and step move of the phase and amplitude is controlled by the Nios soft core CPU which is embeded in FPGA.The Sine look-up table is placed on FPGA's RAM,and the logistic unit of FPGA is used to realize phasic addition and other digital logic functions.The DDS signal source whose two phases are in quadrature is realized. |
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| Keywords: | System on a Programmable Chip(SOPC) Direct Digital Frequency Synthesis(DSS) Field Programmable Gates Array(FPGA) |
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