Neuron MOS binary-logic integrated circuits. I. Design fundamentalsand soft-hardware-logic circuit implementation |
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Authors: | Shibata T. Ohmi T. |
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Affiliation: | Dept. of Electron. Eng., Tohoku Univ., Sendai; |
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Abstract: | Described are the fundamental design principles for binary-logic circuits using a highly functional device called the neuron MOS transistor (νMOS), a single MOS transistor simulating the function of biological neurons. To facilitate logic design employing this transistor, a graphical technique called the floating-gate potential diagram has been developed. It is shown that any Boolean functions can be generated using a common circuit configuration of two-stage νMOS inverters. One of the most striking features of νMOS binary-logic application is the realization of a so-called soft hardware logic circuit. The circuit can be made to represent any logic function (AND, OR, NAND, NOR, exclusive-NOR, exclusive-OR, etc.) by adjusting external control signals without any modifications in its hardware configuration. The circuit allows real-time reconfigurable systems to be built. Test circuits were fabricated by a double-polysilicon CMOS process and their operation was experimentally verified |
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