Evaluation of graded-channel SOI MOSFET operation at high temperatures |
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Authors: | Milene Galeti,Marcelo Antonio Pavanello,Joã o Antonio Martino |
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Affiliation: | a Laboratório de Sistemas Integráveis, Escola Politécnica da Universidade de São Paulo, Av. Prof. Luciano Gualberto, Trav. 3 No. 158, 05508-900, São Paulo, Brazil b Departamento de Engenharia Elétrica, Centro Universitário da FEI, Av. Humberto de Alencar Castelo Branco, No. 3972, 09850-901, São Bernardo do Campo, Brazil |
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Abstract: | ![]() This paper presents a comparative analysis between graded-channel (GC) and conventional fully depleted SOI MOSFETs devices operating at high temperatures (up to 300 °C). The electrical characteristics such as threshold voltage and subthreshold slope were obtained experimentally and by two-dimensional numerical simulations. The results indicated that GC transistors present nearly the same behavior as the conventional SOI MOSFET devices with similar channel length. Experimental analysis of the gm/IDS ratio and Early voltage demonstrated that in GC devices the low-frequency open-loop gain is significantly improved in comparison to conventional SOI devices at room and at high-temperature due to the Early voltage increase. The multiplication factor and parasitic bipolar transistor gain obtained by two-dimensional numerical simulations allowed the analysis of the breakdown voltage, which was demonstrated to be improved in the GC as compared to conventional SOI transistors in thin silicon layer devices in the whole temperature range under analysis. |
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Keywords: | Graded-channel SOI MOSFET High-temperature Fully depleted New structure |
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