| GF（2^8）上快速乘法器及求逆器的设计 |
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| 引用本文： | 王进祥 毛志刚. GF（2^8）上快速乘法器及求逆器的设计[J]. 微电子学, 1998, 28(5): 321-324 |
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| 作者姓名： | 王进祥 毛志刚 |
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| 作者单位： | 哈尔滨工业大学微电子中心 |
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| 摘 要： | 基于多项式乘法理论，采用高层次设计方法，设计并采用ＦＰＧＡ实现了ＧＦ（２＾８）上８位快速乘法器，并利用该乘法器设计了一个计算ＧＦ（２＾８）上任一元素的例数的求逆器，该乘法器与求逆器可以应用于ＲＳ（２５５．２２３）码编／译码器。
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| 关 键 词： | 有限域 乘法器 RS码 逻辑综合 VHDL VLSI |
Design of a Fast Multiplier and Inverse of Multiplier in GF(2 8) |
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| WANG Jin Xiang,MAO Zhi Gang and YE Yi Zheng Microelectronics Center,Harbin Institute of Technology,Harbin,Heilongjiang. Design of a Fast Multiplier and Inverse of Multiplier in GF(2 8)[J]. Microelectronics, 1998, 28(5): 321-324 |
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| Authors: | WANG Jin Xiang MAO Zhi Gang YE Yi Zheng Microelectronics Center Harbin Institute of Technology Harbin Heilongjiang |
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| Affiliation: | WANG Jin Xiang,MAO Zhi Gang and YE Yi Zheng Microelectronics Center,Harbin Institute of Technology,Harbin,Heilongjiang 150001 |
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| Abstract: | Based on the theory of polynomial multiplications,an 8 bit fast multiplier in GF(2 8)is designed using the higher hierarchy technique,and it is implemented in field programmable gate arrays(FPGAs).By using the multiplier,an inverse of multiplier is designed,which computes the reciprocal of any element in GF(2 8).The circuits for computing multiplications and inverses can be used in the RS(255,223) encoder. |
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| Keywords: | Galois field Multiplier RS code Logic synthesis VHDL |
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