An IEEE 802.11 and 802.16 WLAN Wireless Transmitter Baseband Architecture with a 1.2-V, 600-MS/s, 2.4-mW DAC |
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| Authors: | Nicola Ghittori Andrea Vigna Piero Malcovati Stefano D’Amico Andrea Baschirotto |
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| Affiliation: | (1) Department of Electronics, University of Pavia, Pavia, Italy;(2) Present address: Marvell Semiconductor, Pavia, Italy;(3) Present address: Maxim Integrated Products, Pavia, Italy;(4) Department of Electrical Engineering, University of Pavia, Pavia, Italy;(5) Department of Innovation Engineering, Univeristy of Lecce, Lecce, Italy;(6) Present address: Department of Physics, University of Milano Bicocca, Milano, Italy |
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| Abstract: | In this paper, we propose a transmitter baseband architecture for the present and up-coming WLAN applications (IEEE 802.11a/g, 802.11n, 802.16), based on a 600-MS/s current-steering DAC with a passive output load, to perform the baseband signal processing, avoiding the use of any active analog reconstruction filter. The DAC, fabricated in a 0.13-μm CMOS technology, consumes 2.4 mW from a 1.2-V single supply voltage. The DAC exhibits 68 dB of SFDR at full-scale for a 12-MHz input signal frequency and 9.7 bits of full-scale dynamic range in the bandwith from dc to 10 MHz. |
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