Reconfiguration Aspects and a Reconfigurable Outer Block Interleaver for 3G Applications

Reconfiguration concept represents reconfigurable functionalities of the radio interface for mobile radio systems. Particularly for the physical layer, some possible reconfigurable architectures can be identified. We focus on outer interleaving for turbo codes, which can improve their performance in flat Rayleigh fading environment. The larger the number of columns in the outer interleaver, the better is the performance, but with the penalty of more complexity and delay. Furthermore, an incorrect choice of the number of columns can increase the bit and frame error rates. Therefore, it would be advantageous to reconfigure the outer interleaver in different operating environments with the optimum number of columns. Using two different data frame lengths, in this contribution simulation results are presented for the four possible outer block interleaver configurations specified for the 3GPP mobile standard in the case of flat Rayleigh fading channel. It is shown that different operating environments require an optimum number of columns in terms of bit error rate and frame error rate performance. Finally, frame fade duration is considered and the effect of the product of the Doppler frequency with the frame duration on the performance for the four different 3GPP outer block interleaver configurations is discussed. Costas Chaikalis was born in Athens, Greece, on March 7, 1973. He received the B.Sc. degree in electrical engineering in 1995 from Technological Educational Institute of Lamia, Greece. He also received the M.Sc. and Ph.D. degrees from Department of Electronics and Telecommunications, University of Bradford, Bradford, UK in 1999 and 2003, respectively. During his doctoral studies he worked as a Research Assistant for Mobile Virtual Center of Excellence (Mobile VCE), Terminals Group, UK. Since 2003, he is a lecturer in the Department of Electrical Engineering, Technological Educational Institute of Lamia, Greece. His research interests are in all areas of mobile communications but especially in forward error correction coding, reconfigurable (software radio) architectures, cross layer architectures and DSP applications.