| 全集成低相位噪声LC压控振荡器设计 |
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| 引用本文： | 刘颖异,王志功,钱照华. 全集成低相位噪声LC压控振荡器设计[J]. 中国集成电路, 2008, 17(3): 45-48,52 |
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| 作者姓名： | 刘颖异 王志功 钱照华 |
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| 作者单位： | 东南大学射频集成电路与系统教育部工程研究中心,江苏南京,210096 |
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| 摘 要： | 提出了一种应用于ISM频段的低相位噪声LC VC0。电路采用TSMC 0．18μm1P6M混合信号CMOS工艺进行设计，芯片版图面积740μm×700μm。在电源电压为1．8V时，后仿真结果表明，电路工作频率为2．4GHz时，调谐范围为23％。在偏离中心频率1MHz处，相位噪声为-124．2dBc／Hz。核心部分功耗约为7．56mW。
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| 关 键 词： | 压控振荡器 片上电感 Q值 相位噪声 CMOS工艺 |
2.4GHz Monolithically Integrated Low Phase Noise LC Voltage Controlled Oscillator |
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| LIU Ying-yi,WANG Zhi-gong,QIAN Zhao-hua. 2.4GHz Monolithically Integrated Low Phase Noise LC Voltage Controlled Oscillator[J]. China Integrated Circuit, 2008, 17(3): 45-48,52 |
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| Authors: | LIU Ying-yi WANG Zhi-gong QIAN Zhao-hua |
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| Affiliation: | ( Institute of RF- ＆ OE-ICs, Southeast University, Nanjing 210096, China) |
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| Abstract: | A monolithically integrated low phase noise LC voltage controlled oscillator （ VCO ） in an ISM band is presented. It is designed in TSMC＇ s 0.18μ m mixed-signal 1P6M CMOS process. The layout size is 740 μ m × 700 μm. With a 1.SV supply voltage, the post-simulation gives a phase noise of-124.2dBc/Hz at 1MHz off the carrier of 2.4GHz. The percent tuning range is 23% and the core circuit dissipated a power of about 7.56mW. |
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| Keywords: | Voltage controlled oscillator On-chip inductor Quality factor Phase noise CMOS process |
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