基于FPGA的MDDI数据处理电路实现

介绍了一种基于FPGA的MDDI(mobile display digital interface)数据处理电路设计；基于单片集成AM-OLED驱动控制芯片的设计需求以及并行数据总线在移动显示设备上存在的不足,设计了MDDI数据处理电路；MDDI作为一种高速串行移动显示数字接口标准,具有连线数量少,信号传输可靠性高,低功耗等特点,广泛应用于移动显示终端领域；所设计的MDDI Type2主端数据处理电路采用两级状态机控制内部电路,主状态机用于控制从状态机的状态切换,从状态机则用于实现MDDI数据的生成；通过加入可配置寄存器,实现对数据包生成和接口模式的控制；采用Verilog语言编写RTL级代码实现MDDI Type2数据处理电路软核；使用Xilinx工具综合的结果表明,该数据处理电路能够支持480-RGB×320、26万色的AM-OLED显示屏,数据传输速率可达180 Mbps,其性能指标满足系统设计要求。

MDDI Data Processing Circuit Based on FPGA Implementation

A single chip Mobile Display Digital Interface (MDDI) data processing circuit was implemented based on FPGA. Based on the requirements of monolithic integrated AM-OLED driver IC and deficiency of parallel data bus in mobile display device, the MDDI data processing circuit is designed. MDDI is a high-speed serial digital interface standard, since it has many advantages such as less signal lines, higher signal transmission reliability, lower power consumption and the simpler circuits, it is widely used in the mobile display terminal. This paper proposes a novel design strategy for MDDI Type2 host data processing circuit to reduce the complexity of the circuit. In this design, the internal circuits are controlled with two-stage state machines. The master state machine is used to control the state switch from the secondary machine, and the secondary machine is used for generating MDDI data. The configurable registers control the packets generated and change the interface mode. RTL code of the MDDI data processing circuit is designed using Verilog to implement the soft-core. The synthesized results by Xilinx tools show that, this data processing circuit can support AM-OLED display with 480-RGB × 320 resolution and 260k color image data, the maximum transfer rate is 180 Mbps. The performances of the MDDI data processing circuit meet the requirements of system design.