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基于北斗/GPS的网络授时系统设计
引用本文:季志博,朱可,王军.基于北斗/GPS的网络授时系统设计[J].计算机测量与控制,2017,25(10):128-131.
作者姓名:季志博  朱可  王军
作者单位:苏州科技大学, 江苏 苏州 215009,苏州科技大学, 江苏 苏州 215009,苏州科技大学, 江苏 苏州 215009;中国科学院长春光学精密机械与物理研究所, 长春 130033
摘    要:针对电脑主机多采用BIOS内时钟而导致系统时间不精确的问题,提出一种基于北斗/GPS芯片的网络授时系统设计;该系统采用可编程逻辑器件(FPGA)作为主控芯片,接收北斗/GPS双模芯片提供的UTC时间码流,解码并通过网口发送到PC机上作为精准时间;同时多个设备间相互连接,实现多设备之间的数据传输,增强系统的稳定性和可靠性,传输速率可达100 Mbps;实验证明:北斗/GPS接收信号稳定,传输的时间信息准确,北斗/GPS所解时间信息误差不超过80 ns,设备与PC机100 Mbps传输速率误差在1~2 ms,系统稳定、可靠。

关 键 词:可编程逻辑器件  同步授时  北斗/GPS双模  用户数据报协议
收稿时间:2017/2/14 0:00:00
修稿时间:2017/3/9 0:00:00

Design of Network Timing System Based on Beidou /GPS
Ji Zhibo,Zhu Ke and Wang Jun.Design of Network Timing System Based on Beidou /GPS[J].Computer Measurement & Control,2017,25(10):128-131.
Authors:Ji Zhibo  Zhu Ke and Wang Jun
Affiliation:Suzhou University of Science and Technology, Suzhou 215009, China,Suzhou University of Science and Technology, Suzhou 215009, China and Suzhou University of Science and Technology, Suzhou 215009, China;Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, Changchun 130033, China
Abstract:In order to solve the problem of inaccurate time on PC machine uses BIOS internal clock,this paper presents a design of network timing system based on Beidou / GPS chip.FPGA as the main control chip, it receives the Beidou /GPS dual mode chip to provide the UTC time stream, decodes and sends it through the network to the PC machine as a precise time.At the same time, multiple devices are connected with each other to realize data transmission between multiple devices, and the stability and reliability of the system is enhanced.Transmission rate up to 100 Mbps.The experiments proved that:Beidou /GPS receive signal stability, accurate transmission time information, the Beidou /GPS solution time information error is not more than 80 ns, 100 Mbps transmission rate error between device and PC in 1~2 ms, the system is stable and reliable.
Keywords:FPGA  Time synchronization  Beidou /GPS dual mode  UDP
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