| 用于ZigBee的2.4GHz低功耗双增益低噪声放大器 |
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| 引用本文： | 高佩君,闵昊.用于ZigBee的2.4GHz低功耗双增益低噪声放大器[J].半导体学报,2009,30(7):075007-5. |
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| 作者姓名： | 高佩君 闵昊 |
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| 摘 要： | This paper presents a fully differential dual gain low noise amplifier（DGLNA） for low power 2.45-GHz ZigBee/IEEE 802.15.4 applications.The effect of input parasitics on the inductively degenerated cascode LNA is analyzed.Circuit design details within the guidelines of the analysis are presented.The chip was implemented in SMIC 0.18-μm 1P6M RF/mixed signal CMOS process.The DGLNA achieves a maximum gain of 8 dB and a minimum gain of 1 dB with good input return loss.In high gain mode, the measured noise figure（NF） is 2.3-3 dB in the whole 2.45-GHz ISM band.The measured 1-dB compression point, IIP3 and IIP2 is-9, 1 and 33 dBm, respectively.The DGLNA consumes 2 mA of current from a 1.8 V power supply.
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| 关 键 词： | 低噪声放大器 ZigBee 高增益 低功耗 IEEE CMOS 混合信号 噪声系数 |
| 收稿时间： | 1/5/2009 12:00:00 AM |
A 2.4-GHz low power dual gain low noise amplifier for ZigBee |
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| Gao Peijun and Min Hao.A 2.4-GHz low power dual gain low noise amplifier for ZigBee[J].Chinese Journal of Semiconductors,2009,30(7):075007-5. |
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| Authors: | Gao Peijun and Min Hao |
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| Affiliation: | State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China;State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China |
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| Abstract: | CMOS low noise amplifier input parasitics low power noise figure ZigBee IEEE 802.15.4 |
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| Keywords: | CMOS low noise amplifier input parasitics low power noise figure ZigBee IEEE 802 15 4 |
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