A two-stage switch with load balancing scheme maintaining packet sequence |
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Authors: | Hyoung-Il Lee |
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Affiliation: | Electron. & Electr. Examination Bureau, Korean Intellectual Property Office, Daejeon, South Korea; |
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Abstract: | ![]() In this letter, we propose a novel load-balancing scheme for two-stage switches, which does not disturb the sequence of packets. The proposed scheme uses chamber queues (CQs) in front of the second crossbar fabric as well as VOQs in front of the first crossbar. While the proposed scheme is very simple, it can achieve 100% throughput under not only uniform but also non-uniform traffic. Moreover, the simulation results show that the average delay of packets in the proposed two-stage switch is lower than that of the original two-stage switch. |
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