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DA-Based Efficient Testable FIR Filter Implementation on FPGA Using Reversible Logic

Authors:	Amita Nandal T. Vigneswaran Ashwani K. Rana

Affiliation:	1. Department of Electronics and Communication Engineering, National Institute Technology, Hamirpur, 177005, Himachal Pradesh, India 2. Department of Electronics and Communication Engineering, VIT University, Chennai, 600127, Tamil Nadu, India

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