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基于PC/104+总线的嵌入式逻辑分析仪硬件设计
引用本文:尹凯,田书林.基于PC/104+总线的嵌入式逻辑分析仪硬件设计[J].自动化信息,2007(6):40-41.
作者姓名:尹凯  田书林
作者单位:电子科技大学自动化工程学院,成都610054
摘    要:本文介绍了基于PC/104+总线的嵌入式逻辑分析仪的设计原理与实现方法,给出了用PLX9054实现PC/104+总线接口的方案。按照该方法设计的逻辑分析仪可以实现高速数据采集和大容量存储。

关 键 词:逻辑分析仪  PC/104+总线  PCI9054
文章编号:1817-0633(2007)06-0040-02

Hardware Design of an Embedded Logic Analyzer Based on PC/104 plus Bus
YIN Kai, TIAN Shu-lin.Hardware Design of an Embedded Logic Analyzer Based on PC/104 plus Bus[J].Automation Information,2007(6):40-41.
Authors:YIN Kai  TIAN Shu-lin
Affiliation:School of Automation Engineering, University of Electronic Science and Technology of China
Abstract:The design principle and the realization method of an embedded logic analyzer based on PC/104 plus bus are introduced in this paper, in addition, how design and realize the PC/104 plus firmware by using of PLX9054 is presented. The logic analyzer which is designed according to this technical scheme can achieve high speed data acquisition and large storage capacity.
Keywords:Logic Analyzer  PC/104 plus Bus  PCI9054
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