An accurate on-wafer deembedding technique with application to HBTdevices characterization

An accurate deembedding technique for on-wafer measurements of an active device's S-parameter is presented in this paper. This deembedding technique accounts in a systematic way for effect of all parasitic elements surrounding the device. These parasitic elements are modeled as a four-port network. Closed-form equations are derived for deembedding purposes of this four-port network. The proposed deembedding technique was used to extract small-signal model parameters of a 2×25 μm emitter GaInP/GaAs heterojunction bipolar transistor device, and excellent agreement between measured and model-simulated S-parameter was obtained up to 30 GHz