基于Matlab的Virtex-4平台代码自动生成研究

在Matlab环境下,通过Simulink工具箱对Virtex-4平台建立系统模型,并进行软件仿真;再通过SystemGenerator生成基于目标板的硬件协仿真文件,进行硬件仿真并与软件仿真的结果进行比较.对系统模型进行验证,确定其满足设计要求后,通过System Generator生成该模型的HDL文件或网表,在Xilinx的ISE开发环境中进行调用,或者直接生成比特流文件下载到Virtex-4平台目标系统运行,观察代码执行情况.结果表明,基于Matlab的代码自动生成方法可缩短软件设计开发周期,显著提高系统调试和产品升级的灵活性和可靠性.

Study on Code Auto Generation In Virtex-4 Platform Based on Matlab

Based on Matlab a FIR Filer model was proposed.In the Matlab environment,the system model can be created and simulated by means of Simulink toolbox for Virtex-4 platform.The hardware co-simulation target file can be generated by System Generator.The hardware co-simulation results were compared with the software simulation results.If system model is validated and meet the design requirements,from this model we can generate HDL file or netlist which can be called in the Xilinx ISE,or generate a bitstream which can be directly run on Virtex-4 target platform.The experiments show that the automatic code generation method based on Matlab in Virtex-4 platform can shorten the development cycles and dramatically improve system debugging and the flexibility and reliability of product upgrading process.