基于FPGA的SAR预处理器中FIR滤波器的实现

针对合成孔径雷达(SAR)预处理器的技术要求,提出了一种采用现场可编程门阵列器件FPGA并利用窗函数法实现线性FIR数字滤波器硬件电路的设计方案,并以一个16阶低通FIR数字滤波器电路的实现为例说明了利用Xilinx公司的Virtex-E系列芯片的设计过程。对于耗时且占资源的乘累加运算,我们给出了将乘累加运算转化为查表的分布式算法(DA算法)。设计的电路通过软件程序进行了验证和硬件仿真,结果表明电路工作正确可靠,能满足设计要求。

An Implementation of FIR Filter by FPGA Used on SAR Preprocessing Filter

In the real-time processing system of Synthetic Aperture Radar, the preprocessor play a very important role and the main component of the preprocessor is FIR filter. As for the requirements of the Synthetic Aperture Radar's preprocessing filter, this paper proposes a method of FPGA based FIR filter design by linear FIR digital filter window function and accomplished a 16-tap 8-bit FIR filter by using XCV100E FPGA devices. As for the key technical problem-the multipliers, we give the Distributed Arithmetic which converts the multiplications into some look-up operations. This arithmetic uses the LUT resources in the FPGA fully and can improve the system's speed and system's reliability. The design method is very useful for the accomplishment of real-time processor of SAR and will benefit the space-borne Synthetic Aperture Radar real-time processing system. The results of simulation on the hardware circuit prove this method is efficient and can meet the design requirements very well.