Single-electron logic device with simple structure |
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Authors: | Oya T. Asai T. Amemiya Y. |
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Affiliation: | Dept. of Electr. Eng., Hokkaido Univ., Sapporo, Japan; |
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Abstract: | ![]() A logic gate device is described that can be used to develop single-electron LSIs. The device consists of five capacitors and two tunnelling junctions. It accepts two binary inputs and produces NAND or NOR logic output by making use of the voltage shift in its tunnelling threshold caused by the input signals. Computer simulation of a sample subsystem, or a full adder, consisting of the device demonstrated that it operates correctly. |
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