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FPD平行端口矩形区域内电阻驱动的自动布线算法
引用本文:韩奥,赵振宇,刘国强,杨天豪.FPD平行端口矩形区域内电阻驱动的自动布线算法[J].计算机工程与科学,2021,43(6):969-975.
作者姓名:韩奥  赵振宇  刘国强  杨天豪
作者单位:(国防科技大学计算机学院,湖南 长沙 410073)
基金项目:国家科技重大专项(2017ZX01028103)
摘    要:平板显示器技术已逐渐发展为主流屏幕显示技术,而自动化布线是其面板电路和触摸屏电路设计领域的重要研究任务之一。根据布线需求的不同,需要不同的布线解决方案,如定阻值布线或等电阻布线。该类布线任务通常需要在2组端口间进行指定布线区域和最大电阻值的布线。每根布线电阻限制在指定范围内,从而满足IC驱动负载的要求。平行端口矩形区域布线是常见且重要的布线目标,找到一种合适的空间分配方案是十分必要的。电阻驱动的端到端布线算法,在布线规划时进行端口分组,然后对每组端口进行多段式的预布线,再以自适应步长调节电阻至限定区域。在3个对比实验中成功完成了30个平行端口实例的布线。相比于简单三段式布线和定步长调节电阻的形式,能够有效减少约40%的平均布线时间和31%的平均内存,布线电阻达标率为100%。

关 键 词:定阻值布线  平行端口  矩形边界  面板电路设计  空间分配  
收稿时间:2020-08-20
修稿时间:2020-12-23

A resistance-driven automatic routing algorithm in rectangular area of FPD parallel ports
HAN Ao,ZHAO Zhen-yu,LIU Guo-qiang,YANG Tian-hao.A resistance-driven automatic routing algorithm in rectangular area of FPD parallel ports[J].Computer Engineering & Science,2021,43(6):969-975.
Authors:HAN Ao  ZHAO Zhen-yu  LIU Guo-qiang  YANG Tian-hao
Affiliation:(College of Computer Science and Technology,National University of Defense Technology,Changsha 410073,China)
Abstract:Flat panel display technology has gradually developed into mainstream screen display technology, and automated routing is one of the important research tasks in the field of panel circuit and touch screen circuit design. Different routing solutions are required according to different routing requirements, such as fixed resistance routing or equal resistance routing. This type of routing task usually requires the routing with a designated routing area and maximum resistance between the two sets of ports. The resistance of each route is limited within the specified range, so as to meet the requirements of the IC to drive the load. Parallel port rectangular area routing is a common and important routing target, and it is necessary to find a suitable space allocation plan. The resistance-driven intelligent routing algorithm in the rectangular routing area of parallel ports is to group ports during the rout planning, then perform multi-segment pre-routing for each group of ports, and finally adjust the resistance to a limited area with an adaptive step. Three comparison experiments are successfully completed for the routing of 30 parallel port instances. Compared with the simple three-segment routing method and the fixed-step resistance adjustment method, it can effectively reduce the average routing time by about 40% and the average memory by 31%, and the routing resistance compliance rate is 100%.
Keywords:fixed resistance routing  parallel port  rectangle border  panel circuit design  space allocation  
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