| 基于DSP Builder的带宽自适应全数字锁相环的设计与实现 |
| |
| 引用本文： | 李勇,朱立军,单长虹.基于DSP Builder的带宽自适应全数字锁相环的设计与实现[J].现代电子技术,2010,33(16):1-4. |
| |
| 作者姓名： | 李勇 朱立军 单长虹 |
| |
| 作者单位： | 南华大学电气工程学院,湖南,衡阳,421001 |
| |
| 基金项目： | 湖南省科技厅资助项目 |
| |
| 摘 要： | 提出一种设计全数字锁相环的新方法,采用基于PI控制算法的环路滤波器,在分析模拟锁相环系统的数学模型的基础上,建立了带宽自适应全数字锁相环的数学模型。使用DSP Builder在Matlab/Simulink环境下搭建系统模型,并采用FPGA实现了硬件电路。软件仿真和硬件测试的结果证明了该设计的正确性和易实现性。该锁相环具有锁频速度快、频率跟踪范围宽的特点。同时,系统设计表明基于DSP Builder的设计方法可缩短设计周期,提高设计的灵活性。
|
| 关 键 词： | DSP Builder 带宽自适应 PI控制 全数字锁相环 |
Design and Implementation of Adaptive Bandwidth All-digital Phase-locked Loop Based on DSP Builder |
| |
| LI Yong,ZHU Li-jun,SHAN Chang-hong.Design and Implementation of Adaptive Bandwidth All-digital Phase-locked Loop Based on DSP Builder[J].Modern Electronic Technique,2010,33(16):1-4. |
| |
| Authors: | LI Yong ZHU Li-jun SHAN Chang-hong |
| |
| Affiliation: | LI Yong,ZHU Li-jun,SHAN Chang-hong(College of Electrical Engineering,Nanhua University,Hengyang 421001,China) |
| |
| Abstract: | A novel design method of all-digital phase-locked loop which adopts a loop filter based on PI(proportional-integra1)control algorithm is presented in this paper.The mathematical model of adaptive bandwidth all-digital phase-locked loop is established on the basis of the mathematical model analysis of analog phase-locked loop.The system model is built with DSP Builder in the Matlab/Simulink environment.The hardware circuit is realized with the FPGA.The correctness and achievability of the design are verified... |
| |
| Keywords: | DSP Builder |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
|
