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Simulation of the gate tunnel current in the double gate (DG) MOS transistor |
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| Authors: | B. Majkusiak J. Walczak |
| Affiliation: | (1) Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw, Poland |
| Abstract: | |
| Keywords: | MOS transistor SOI devices Modeling Quantum effects Tunneling |
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