| 用DES算法构造跳频码序列发生器的实现研究 |
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| 引用本文： | 张申如,邓晓燕,汪泽焱,汪海洋. 用DES算法构造跳频码序列发生器的实现研究[J]. 电路与系统学报, 2002, 7(3): 35-38 |
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| 作者姓名： | 张申如 邓晓燕 汪泽焱 汪海洋 |
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| 作者单位： | 解放军理工大学,理学院,江苏,南京,210016 |
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| 基金项目： | 成都电子科技大学战术通信抗干扰技术国防科技重点实验室基金资助项目(00JS04.4.1JB3801) |
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| 摘 要： | 基于计数式TOD的跳频码序列产生算法实际上是对TOD这一特殊信息流序理的分组加密变换，我们建议使用DES算法构成分组加密变换。所设计的跳频码序列发生器，在输出序列的均匀性、相关性、复杂性、游程、频隙滞留和FPGA上的可实现性等方面都能满足实际要求。这是一个性能良好、也便于FPGA实现的跳频码发生器方案。
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| 关 键 词： | DES算法 跳频码序列发生器 跳频通信 TOD 军事通信 抗干扰 |
| 文章编号： | 1007-0249(2002)03-0035-04 |
| 修稿时间： | 2001-02-12 |
Implementation of Hopping Code Generator Using DES Algorithm |
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| ZHANG Shen-ru,DENG Xiao-yian,WANG Ze-yan,WANG Hai-yang. Implementation of Hopping Code Generator Using DES Algorithm[J]. Journal of Circuits and Systems, 2002, 7(3): 35-38 |
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| Authors: | ZHANG Shen-ru DENG Xiao-yian WANG Ze-yan WANG Hai-yang |
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| Abstract: | Based on analysis of hopping code generating algorithm with TOD counter, it is realized that the generation of hopping codes is actually a process in which the special information sequences TOD are translated by a block encoder. It is proposed in this article that DES can be used as a block encoder. A great deal of test work has been done to generate hopping code sequences. Experiment results demonstrate that the proposed scheme can generate hopping code good sequences with good characteristics in uniformity, correlation, complexity, path length and frequency interval stay. This scheme can be easily implemented in FPGA. |
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| Keywords: | FH communication Time of Day statistic test Data Encryption Standard Field Programmable Gate Array. |
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