| 根升余弦脉冲成形滤波器FPGA实现 |
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| 引用本文： | 赵林军. 根升余弦脉冲成形滤波器FPGA实现[J]. 现代电子技术, 2011, 34(1): 23-25,28 |
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| 作者姓名： | 赵林军 |
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| 作者单位： | 陕西理工学院,电信工程系,陕西,汉中,723003 |
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| 基金项目： | 陕西省自动化重点实验室基金(08JZ18)资助; 陕西省教育厅自然科学研究基金(08JK254)资助 |
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| 摘 要： | 提出了基于电路分割技术实现通信系统发送端根升余弦波形成形滤波器查表法的FPGA结构，节省了ROM单元，讨论了其ROM初始化时形渡数据的组织方法，完成了该结构的VHDI。实现，给出了该设计在Modelsim环境下的时序仿真结果。通过对仿真结果分析，表明所述的设计方法是可行的。该设计方案不随波形样本数目的增多而使电路系统变得更为复杂，它所实现的成形滤波器满足于高速成形的应用需求。
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| 关 键 词： | 根升余弦 成形滤波器 查找表 FPGA |
FPGA Implementation of Square Root Raised Cosine Pulse Shaping Filter |
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| ZHAO Lin-jun. FPGA Implementation of Square Root Raised Cosine Pulse Shaping Filter[J]. Modern Electronic Technique, 2011, 34(1): 23-25,28 |
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| Authors: | ZHAO Lin-jun |
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| Affiliation: | ZHAO Lin-jun(Department of Electronics & Information Engineering,Shaanxi University of Technology,Hanzhong 723003,China) |
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| Abstract: | The FPGA implementation of look-up table arithmetic-based square root raised cosine pulse shaping filter in communication system based on circuit segmentation is proposed,and how to calculate the initialization ROM data of a forming waveform is discussed.On this basis,the VHDL code and the Modelsim simulation results are elucidated.The design method is simple and easy,and is very suitable for high speed forming application. |
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| Keywords: | square root raised cosine shaping filter look-up table FPGA |
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