Efficient multiple path propagating tests for delay faults

This paper presents a test generation procedure for obtainingmaximal multiple-path-propagating robust tests, which detect the largest possible number of path faults simultaneously. Specialized heuristics are used to facilitate the generation of such tests in two-level circuits, and methods are given for extensions to multi-level circuits. Experimental results are presented to demonstrate the efficacy of this approach, which is seen to significantly reduce test-set lengths for path delay faults by generating highlyefficient robust tests. Limitations of the method are discussed, together with suggestions for future research.