首页 | 本学科首页   官方微博 | 高级检索  
     


Pipelining and bypassing in a VLIW processor
Authors:Abnous   A. Bagherzadeh   N.
Affiliation:Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA;
Abstract:This short note describes issues involved in the bypassing mechanism for a very long instruction word (VLIW) processor and its relation to the pipeline structure of the processor. The authors first describe the pipeline structure of their processor and analyze its performance and compare it to typical RISC-style pipeline structures given the context of a processor with multiple functional units. Next they study the performance effects of various bypassing schemes in terms of their effectiveness in resolving pipeline data hazards and their effect on the processor cycle time
Keywords:
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号