The Architecture and Development Flow of the S5 Software Configurable Processor |
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Authors: | Jeffrey M Arnold |
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Affiliation: | (1) Stretch, Inc., 1322 Orleans Drive, Sunnyvale, CA, USA |
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Abstract: | A software configurable processor (SCP) is a hybrid device that couples a conventional processor datapath with programmable
logic to allow application programs to dynamically customize the instruction set. SCP architectures can offer significant
performance gains by exploiting data parallelism, operator specialization and deep pipelines. The S5000 is a family of high
performance software configurable processors for embedded applications. The S5000 consists of a conventional 32-bit RISC processor
coupled with a programmable Instruction Set Extension Fabric (ISEF). To develop an application for the S5 the programmer identifies
critical sections to be accelerated, writes one or more extension instructions as functions in a variant of the C programming
language, and accesses those functions from the application program. Performance gains of more than an order of magnitude
over the unaccelerated processor can be achieved.
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Keywords: | reconfigurable architectures software configurable processor instruction set extension embedded computing |
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