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Simultaneous extraction of source and drain resistances in top contact organic thin film transistors from a single test structure
Authors:Ashish K. Agarwal  Baquer Mazhari
Affiliation:Department of Electrical Engineering and Samtel Center for Display Technology, Indian Institute of Technology, Kanpur 208 016, India
Abstract:A method of extraction of source and drain resistances in linear mode of operation from a single transistor is described. The proposed method can also be used to measure source resistance over the entire operating range from linear to saturation mode of operation. The method uses two floating probes outside the channel, one adjacent to the source and the other to the drain to sense the voltage under these contacts. Using transmission line analysis, the source and drain resistances are directly extracted from these measurements. 2D numerical simulation results confirm the validity of the proposed technique and sensitivity analysis shows that the method is more accurate than the conventional gated four probe technique, especially, when the source resistance is much smaller than the channel resistance. Experimental results obtained with Pentacene top-contact transistors are used to illustrate the proposed technique. Analysis of two devices with very different source resistance is carried out to highlight the ability of the proposed technique to offer insight into the different contributing factors. Current crowding under the source contact and accurate estimation of mobility without the distorting effects of source resistance are also described.
Keywords:OTFT   Contact resistance   PVP   Pentacene   Current crowding   Transmission line model
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