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SoMMA: A software-managed memory architecture for multi-issue processors
Affiliation:1. CEA, LETI, Univ. Grenoble Alpes, 38000, Grenoble, France;2. Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil;1. Instituto Federal de Educação Ciência e Tecnologia do Rio Grande do Sul, Porto Alegre, Brazil;2. Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil;1. Research Scholar, Department of ECE, Koneru Lakshmaiah Educational Foundation, Vaddeswaram, Guntur, Andhra Pradesh, India-522502;2. Professor, Department of ECM, Koneru Lakshmaiah Educational Foundation, Vaddeswaram, Guntur, Andhra Pradesh, India-522502;1. Department of ECE, Excel Engineering College, Namakkal, India;2. Department of IT, K.S.R College of Engineering, Namakkal, India
Abstract:Embedded processors rely on the efficient use of instruction-level parallelism to answer the performance and energy needs of modern applications. Though improving performance is the primary goal for processors in general, it might lead to a negative impact on energy consumption, a particularly critical constraint for current systems. In this paper, we present SoMMA, a software-managed memory architecture for embedded multi-issue processors that can reduce energy consumption and energy-delay product (EDP), while still providing an increase in memory bandwidth. We combine the use of software-managed memories (SMM) with the data cache, and leverage the lower energy access cost of SMMs to provide a processor with reduced energy consumption and EDP. SoMMA also provides a better overall performance, as memory accesses can be performed in parallel, with no cost in extra memory ports. Compiler-automated code transformations minimize the programmer's effort to benefit from the proposed architecture. The approach shows average speedups of 1.118x and 1.121x, while consuming up to 11% and 12.8% less energy when comparing two modified ρVEX processors and their baselines, at full-system level comparisons. SoMMA also shows reduction of up to 41.5% on full-system EDP, maintaining the same processor area as baseline processors.
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