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A study on charge reduction in HfO/sub 2/ gate stacks
Authors:Zhihong Zhang Min Li Campbell  SA
Affiliation:Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA;
Abstract:Charge in metal-organic chemical vapor deposition-grown HfO/sub 2/ gate stacks has been systematically studied using nMOS capacitors. It is found that, for these films, the charge in the stack is mainly concentrated at the interfaces between the layers and is negative at the HfO/sub 2//interfacial layer (IL) interface and positive at the Si/IL interface. In general, the calculated charge densities at both interfaces are of order 10/sup 12/ cm/sup -2/. A forming gas anneal (FGA) reduces both interface charge greatly. The FGA can also significantly reduce the hysteresis and interface state density. The effects of post deposition anneal at various temperatures and under various ambients have also been studied. It is found that a high-temperature dilute oxidizing ambient anneal followed by an FGA reduces the charge at both interfaces.
Keywords:
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