New CMOS Class AB Transmitter for 10 Gb/s Serial Links

This paper presents a new fully differential CMOS class AB transmitter for 10 Gb/s serial links. The transmitter consists of a fully differential multiplexer, a rail-to-rail configured pre-amplification stage, and a push-pull output stage. The multiplexer achieves a high multiplexing speed by using modified pseudo-NMOS logic where pull-up networks are replaced with self-biased active inductors. The rail-to-rail configured pre-amplification stage with active inductors amplifies the signals from the multiplexer. The fully differential output current is generated by a class AB output stage operated in a push-pull mode. High data rates of the transmitter are obtained by ensuring that the transistors in both the pre-amplification and output stages are always in saturation and the voltage swing of all critical nodes is small. The fully differential configuration of the transmitter effectively suppresses common-mode disturbances, particularly those coupled from the power and ground rails, the electro-magnetic interference exerted from channels to neighboring devices is also minimized. The transmitter minimizes switching noise by drawing a constant current from the supply voltage. The transmitter has been implemented in TSMC 0.18 μm 1.8 V 6-metal CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM3.3 device models. Simulation results demonstrate that the transmitter provides a 5 mA peak-to-peak differential output current with 100 ps eye-width and >5 mA eye-height at 10 Gb/s. The transmitter consumes 18 mW with a total transistor area of 100 μm² approximately. Jean Jiang received the B.Eng. degree in Electrical Engineering from Wuhan University of Technology, Wuhan, China in 1995, and the M.A.Sc. degree in Electrical and Computer Engineering from Ryerson University, Toronto, Ontario, Canada in 2004. From 1999 to 2001, she worked for Ericsson Global IT Services where she was a technical staff to maintain computer networks. From 2002 to 2004, she was a research assistant and a M.A.Sc. student with the Microsystem Research Laboratory in the Department of Electrical and Computer Engineering at Ryerson University. She is now with Intel Corp., CA. as an IC design engineer. Her research interests are in analog CMOS circuit design for high-speed data communications. Jean Jiang was awarded the Ontario Graduate Scholarship in 2003–2005 for academic excellence. Fei Yuan received the B.Eng. degree in electrical engineering from Shandong University, Jinan, China in 1985, the M.A.Sc. degree in chemical engineering and Ph.D. degree in electrical engineering from University of Waterloo, Waterloo, Ontario, Canada in 1995 and 1999, respectively. During 1985–1989, he was a Lecturer in the Department of Electrical Engineering, Changzhou Institute of Technology, Jiangsu, China. In 1989 he was a Visiting Professor at Humber College of Applied Arts and Technology, Toronto, Ontario, Canada, and Lambton College of Applied Arts and Technology, Sarnia, Ontario, Canada. He was with Paton Controls Limited, Sarnia, Ontario, Canada as a Controls Engineer during 1989–1994. Since 1999 he has been with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, Ontario, Canada, where he is currently an Associate Professor and the Associate Chair for Undergraduate Studies and Faculty Affairs. He is the co-author of the book Computer Methods for Analysis of Mixed-Mode Switching Circuits (Springer-Verlag, 2004, with Ajoy Opal). Dr. Yuan received the Ryerson Research Chair award from Ryerson University in Jan. 2005, the Research Excellence Award from the Faculty of Engineering and Applied Science of Ryerson University in 2004, the post-graduate scholarship from Natural Science and Engineering Research Council of Canada during 1997–1998, and the Teaching Excellence Award from Changzhou Institute of Technology in 1988. Dr. Yuan is a senior member of IEEE and a registered professional engineer in the province of Ontario, Canada.