Industrial strength polygon clipping: A novel algorithm with applications in VLSI CAD |
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Authors: | Lucanus J. Simonson |
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Affiliation: | aIntel Corporation, 2200 Mission College Blvd., Santa Clara, CA, 95054, United States |
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Abstract: | We present an algorithm to compute the topology and geometry of an arbitrary number of polygon sets in the plane, also known as the map overlay. This algorithm can perform polygon clipping and related operations of interest in VLSI CAD. The algorithm requires no preconditions from input polygons and satisfies a strict set of post conditions suitable for immediate processing of output polygons by downstream tools. The algorithm uses sweepline to compute a Riemann–Stieltjes integral over polygon overlaps in O((n+s)log(n)) time given n polygon edges with s intersections. The algorithm is efficient and general, handling degenerate inputs implicitly. Particular care was taken in implementing the algorithm to ensure numerical robustness without sacrificing efficiency. We present performance comparisons with other polygon clipping algorithms and give examples of real world applications of our algorithm in an industrial software setting. |
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Keywords: | Polygon clipping Map overlay Sweep algorithm VLSI Application Boost Computational geometry Polygon |
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