| A 6-bit 3-Gsps ADC implemented in 1μm GaAs HBT technology |
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| 作者姓名： | 张金灿, 张玉明, 吕红亮, 张义门, 肖广兴, 叶桂平 |
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| 基金项目： | Project supported by the National Basic Research Program of China （No. 2010CB327505）, the Advance Research Project of China （No. 51308xxxx06）, and the Advance Research Foundation of China （No. 9140A08xxxx 11DZ 111）. |
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| 摘 要： | The design and test results of a 6-bit 3-Gsps analog-to-digital converter （ADC） using 1 μm GaAs het- erojunction bipolar transistor （HBT） technology are presented. The monolithic folding-interpolating ADC makes use of a track-and-hold amplifier （THA） with a highly linear input buffer to maintain a highly effective number of bits （ENOB）. The ADC occupies an area of 4.32 × 3.66 mm2 and achieves 5.53 ENOB with an effective resolution bandwidth of 1.l GHz at a sampling rate of 3 Gsps. The maximum DNL and INL are 0.36 LSB and 0.48 LSB, respectively.
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| 关 键 词： | GaAs ADC HBT 技术 双极晶体管 输入缓冲器 分辨率带宽 折叠插值 |
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