首页 | 本学科首页   官方微博 | 高级检索  
     


A 3 to 5 GHz low-phase-noise fractional-N frequency synthesizer with adaptive frequency calibration for GSM/PCS/DCS/WCDMA transceivers
Authors:Pan Yaohua  Mei Niansong  Chen Hu  Huang Yumei  and Hong Zhiliang
Affiliation:State Key Laboratory of ASIC & Systems,Fudan University,Shanghai 201203,China
Abstract:A low-phase-noise S-A fractional-TV frequency synthesizer for GSM/PCS/DCS/WCDMA transceivers is presented.The voltage controlled oscillator is designed with a modified digital controlled capacitor array to extend the tuning range and minimize phase noise.A high-resolution adaptive frequency calibration technique is introduced to automatically choose frequency bands and increase phase-noise immunity.A prototype is implemented in 0.13μm CMOS technology.The experimental results show that the designed 1.2 V wideband frequency synthesizer is locked from 3.05 to 5.17 GHz within 30μs,which covers all five required frequency bands.The measured in-band phase noise are -89,-95.5 and -101 dBc/Hz for 3.8 GHz,2 GHz and 948 MHz carriers,respectively, and accordingly the out-of-band phase noise are -121,-123 and -132 dBc/Hz at 1 MHz offset,which meet the phase-noise-mask requirements of the above-mentioned standards.
Keywords:phase-locked loop  loop stability analysis  voltage controlled oscillation  phase noise
本文献已被 CNKI 万方数据 等数据库收录!
点击此处可从《半导体学报》浏览原始摘要信息
点击此处可从《半导体学报》下载全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号