A GaAs four-quadrant analog multiplier circuit |
| |
| Authors: | Siferd R |
| |
| Affiliation: | Dept. of Electr. Eng., Wright State Univ., Dayton, OH; |
| |
| Abstract: | A design for a four-quadrant analog multiplier is presented using GaAs MESFETs. The fabricated circuit has a -3 dB bandwidth of 410 MHz with 50-Ω/6.5-pF output loading, nonlinearity of less than 1%, and static power dissipation of 86.1 mW with Vdd=3 V and Vss=-2 V. Simulations indicate the circuit will operate at frequencies over 2.0 GHz with on-chip loads of 0.15 pF |
| |
| Keywords: | |
|
|
