| 高速加密硬件的研究、设计与实现 |
| |
| 引用本文： | 吕涛. 高速加密硬件的研究、设计与实现[J]. 信息安全与通信保密, 1995, 0(2) |
| |
| 作者姓名： | 吕涛 |
| |
| 作者单位： | 西南通信研究所 成都 |
| |
| 摘 要： | 未来的高速信息系统网需要在数百兆位级甚至千兆位级工作的高速加密硬件,国外在这方面开展了大量的工作,并且已经取得部分成果。本文将对这些成果作详细介绍,同时还将介绍可用于开发高速加密硬件的一些新技术。
|
| 关 键 词： | 高速加密 芯片 VLSI 设备 技术 |
The Research,Design and Implementation of High-Speed Encryption Hardwares |
| |
| Lu Tao. The Research,Design and Implementation of High-Speed Encryption Hardwares[J]. China Information Security, 1995, 0(2) |
| |
| Authors: | Lu Tao |
| |
| Affiliation: | Southwest Communications Institute Chengdu 610041 |
| |
| Abstract: | High-speed encryption hardwares operating above the rate of 100Mb/s are necessary for future high-speed information system networks.The work have been widely carried out abroad,and some results have been obtaincd.The paper describes the results in detail,and introduces some new technologies suitable for developing high-speed encryption hardwares. |
| |
| Keywords: | High-speed encryption Chip VLSI Equipment Technology |
| 本文献已被 CNKI 等数据库收录！ |
