High-level customization framework for application-specific NoC architectures |
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Authors: | Iraklis Anagnostopoulos Alexandros Bartzas Iason Filippopoulos Dimitrios Soudris |
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Affiliation: | 1. School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), Athens, Greece 2. Department of Electronics and Telecommunications, Norwegian University of Science and Technology (NTNU), Trondheim, Norway
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Abstract: | Network-on-Chip (NoC) has been recognized as the new paradigm to interconnect and organize a high number of cores. NoCs address global communication issues in System-on-Chips (SoC) involving communication-centric design and implementation of scalable communication structures evolving application-specific NoC design as a key challenge to modern SoC design. In this paper we present a SystemC customization framework and methodology for automatic design and evaluation of regular and irregular NoC architectures. The presented framework also supports application-specific optimization techniques such as priority assignment, node clustering and buffer sizing. Experimental results show that generated regular NoC architectures achieve an average of 5.5 % lower communication-cost compared to other regular NoC designs while irregular NoCs proved to achieve on average 4.5×higher throughput and 40 % network delay reduction compared to regular mesh topologies. In addition, employing a buffer sizing algorithm we achieve a reduction in network’s power consumption by an average of 45 % for both regular and irregular NoC design flow. |
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