Simulation and measurement of supply and substrate noise in mixed-signal ICs |
| |
| Authors: | Owens BE Adluri S Birrer P Shreeve R Arunachalam SK Mayaram K Fiez TS |
| |
| Affiliation: | Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA; |
| |
| Abstract: | Digital noise in mixed-signal circuits is characterized using a scalable macromodel for substrate noise coupling. The noise coupling obtained through simulations is verified with measured data from a digital noise generator and noise sensitive analog circuits fabricated in the 0.35-/spl mu/m heavily doped CMOS process. The simulations and measurements also demonstrate the effectiveness of including grounded guard rings and separating bulk and supply pins in digital circuits to reduce substrate coupling. |
| |
| Keywords: | |
|
|
