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RNS与Delta-Sigma编码的位数据流的数值转换算法及硬件实现
引用本文:佟国香,李毅. RNS与Delta-Sigma编码的位数据流的数值转换算法及硬件实现[J]. 微电子学与计算机, 2011, 28(6): 8-11
作者姓名:佟国香  李毅
作者单位:上海理工大学光电信息与计算机工程学院,上海200093;上海市现代光学系统重点实验室,上海200093
摘    要:利用RNS(余数数制系统)可以执行并行的数据处理以及实现快速无进位算法,在VLSI(超大规模集成电路)设计中表现出低功耗、占用面积小和时延少等优良特性.根据中国剩余定理,基于(2n-1)2n(2n+1)模组,利用Verilog语言设计了RNS到位数据流的数值转换接口电路.以使传统的多位数(Bit)的复杂运算转化为多个并行的较少位数的简单运算,从而降低单次运算的复杂度、时延和功耗.该转换电路面向"Σ-Δ"编码的数据流,不同于传统的二进制数据转换,可以方便地与基于DSD(Direct Stream Digital)的Delta-Sigma系统进行无缝连接.

关 键 词:余数数制系统  模组  位数据流  中国剩余定理  数字信号处理

Hardware Implement and Conversion Algorithm for RNS to Delta-Sigma Modulated Bit Stream
TONG Guo-xiang,LI Yi. Hardware Implement and Conversion Algorithm for RNS to Delta-Sigma Modulated Bit Stream[J]. Microelectronics & Computer, 2011, 28(6): 8-11
Authors:TONG Guo-xiang  LI Yi
Affiliation:TONG Guo-xiang1,2,LI Yi1,2(1 School of Optical-Electrical and Computer Engineering,University of Shanghai for Science and Technology,Shanghai 200093,China,2 Shanghai Key Laboratory of Modern Optical System,China)
Abstract:Because the parallel data processing and the fast carry-free algorithm can be used by using Residue Number System(RNS) in VLSI(very large scale integration) design,RNS(Residue Number System) shows the high performance,such as low power consumption,small area,and short delay,etc.According to Chinese Reminder Theorem,based on(2n-1)2n(2n+1) Moduli set,the bit stream to RNS converting interface circuit is designed using Verilog language.So as to the traditional complex operation can be instead of the simple ope...
Keywords:RNS(Residue Number System)  moduli set  bit stream  Chinese Reminder Theorem  digital signal processing  
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