高性能片式多层氧化锌压敏电阻器材料研究

对非Bi系氧化锌压敏电阻材料进行了系统研究。研究结果表明:在ZnO基体材料中,添加适量PbO、Co2O3、Cr2O3、MnO2、ZrO2、TiO2、Sb2O3 、B2O3等非Bi系添加剂,采用传统陶瓷制备工艺和合适烧结工艺,可获得a >50、IL<1 mA、烧结温度低于1 100℃的实用非Bi系氧化锌电阻瓷料。采用该瓷料,利用MLC工艺,选用Pd30/Ag70电极浆料,制作出V1mA<30 V、a >30、IL<1 mA的片式多层压敏电阻器。

Study on the Materials for Chip Multilayer Zinc Oxide Varistors of High Performance

A multilayer varisitor of high performance was prepared by a typical technique for multilayer ceramic capacitors. Pd30/Ag70 was adopted as inner electrode material and a new kind of Bi-free zinc oxide ceramic material as the body material. It was fired at the temperature below 1 100℃. In the material, non-bismuth additives such as PbO, Co2O3, Cr2O3, MnO2, ZrO2, TiO2, Sb2O3, B2O3, ZnO were introduced. Of the disk samples (10 mm1 mm) made from the material, the non-linear coefficient a > 50, V1mA = 390 V and leakage current IL < 1mA. Of the chip multilayer samples, V1mA<30 V, a >30, IL<1 mA .