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基于FPGA的容错计算机故障注入研究
引用本文:孙睿,张涛,萧德云,郭林.基于FPGA的容错计算机故障注入研究[J].微计算机信息,2010(14).
作者姓名:孙睿  张涛  萧德云  郭林
作者单位:清华大学自动化系;
摘    要:为了验证以FPGA为主控制器的容错计算机的可靠性,利用构造双NIOSII系统的方法,设计了模拟量、数字量、通讯量以及单粒子效应的故障注入系统。该系统可以通过软件由用户选择故障参数,对容错计算机进行故障输入。它无需改变原容错计算机的硬件设计,对原操作系统也无特殊的要求。

关 键 词:FPGA  容错  故障注入  EDAC  单粒子翻转  

Study of Fault-Injection for FPGA Based Fault-Tolerant Computer
SUN Rui ZHANG Tao XIAO De-yun GUO Lin.Study of Fault-Injection for FPGA Based Fault-Tolerant Computer[J].Control & Automation,2010(14).
Authors:SUN Rui ZHANG Tao XIAO De-yun GUO Lin
Affiliation:(Department of Automation,Tsinghua University,Beijing,100084,China) SUN Rui ZHANG Tao XIAO De-yun GUO Lin
Abstract:This paper introduces the design of the fault-injection system which is based on the dual NIOS II system method to inject analog fault,digital fault,as well as single event phenomenon fault,into a FPGA based fault-tolerant computer system.This faultinjection system can accept fault parameters through software,which does not need the change of the hardware of the object system.It also has no requirement for the operating system running on the object system.
Keywords:FPGA  Fault-tolerance  Fault-injection  EDAC  Single Event Upset  
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